Makefile for Flex
Seeing as how I made a big fuss about getting Flex to compile in Cygwin so that tools like make would work, I guess I should sort out a makefile for my flex projects. In my C projects I had put together a fairly generic makefile that could easily be adapted to all the projects I was working on. So I’m tweaking that to work for my flex programs.
Perhaps I should open up with a brief discussion of how make works. Essentially its a script that compiles your project along with all of its dependencies. If thats all it did a simple shell script would work as well, so it has a few other options as well. The most notable is its date checking, it will compare the modification dates of the source and the compiled object for all dependencies and only compile those whose source is newer. This really can save time since it will cut out unnecessary compiles when you do a build.
The compile script in make is divided up into various targets. When a certain part of the compile needs done you would use its individual target to compile it. You might also include some other targets like main to compile the full program, clean which will cleanup the compile directory, or noargs which is used when no target is specified.
As we make the makefile, which is the filename as well, we’ll start out with our first target. The target is listed in the file with no indentation and has this syntax:
<name> : <dependencies>
Where the name is whatever you’d like to call this target and dependencies is a list of other targets that need to be made before this one.
All the lines that follow it should be indented with a single tab. That will mark them as lines of script to be executed when that target is called for. In there we’d add the necessary commands to compile that target. In Flex it would look something like this:
main :
mxmlc SourceFile.mxml
We’d make the main target and it would run the command to compile our source.
I’ll use my zoom button project as an example for this. My main target would compile the main application, which is the source ZoomButtonTest.mxml. I would then list the target for the button control as a dependency, this way it would be compiled before the main application.
Our makefile might look something like this:
main : ZoomButton.swf
mxmlc ZoomButtonTest.mxml
ZoomButton.swf :
mxmlc ZoomButton.mxml
You’ll notice that I named the target for the control as the name of the file. That may not be very descriptive, but it does let us make use of make’s date checking ability. Dependencies not only refer to targets in the make file, they also can refer to files as well. If you name the target after the object that will be created and set the source as dependencies it will check those files before attempting the compile.
With that in mind, our makefile would work better like this:
main : ZoomButton.swf
mxmlc ZoomButtonTest.mxml
ZoomButton.swf : ZoomButton.mxml
mxmlc ZoomButton.mxml
Now it will only compile ZoomButton.swf if the source file has a newer date.
It can be rather tedious adding a target for every dependency in your project. You’ll just copy the same couple lines and rename the files being used. Make provides an easier way to do this. You can use the percent sign as a wild card in the target name and dependencies to match multiple files. In the script you can use $< to refer to the dependency file name and $@ as the target file name. If we change our make file to this:
main : ZoomButton.swf
mxmlc ZoomButtonTest.mxml
%.swf : %.mxml
mxmlc %<
It would work exactly as it did before. Except now, if we add additional dependencies we don’t need to add more targets to our makefile, it can automatically handle them for us.
Inside the targets you can use any shell command available to you. I’m only using the command to compile the source, but we could add some descriptions with the echo command.
main : ZoomButton.swf
echo "Compiling ZoomButtonTest.mxml"
mxmlc ZoomButtonTest.mxml
%.swf : %.mxml
echo "Compiling $@"
mxmlc $<
This also lets me show the $@ in action. If you run this the output will look a little odd. Make will show the command run, and then you’ll see the output from the command. This is fine on the compiler commands, however on the echo’s its not very helpful. If we precede a command with @ make won’t show the command, just the output which is exactly how we’d like the echo’s to work.
main : ZoomButton.swf
@ echo "Compiling ZoomButtonTest.mxml"
mxmlc ZoomButtonTest.mxml
%.swf : %.mxml
@ echo "Compiling $@"
mxmlc $<
The last thing to mention about makefiles is that it will allow you to use constants. These don’t get indented either, and have the syntax:
<name> = <value>
Where name is the constant’s name, and value is the text placed in the constant. You can use them anywhere in the file as ${name} and it will replace it with the text value.
DEPS = ZoomButton.swf
CC = mxmlc
main : ${DEPS}
@ echo "Compiling ZoomButtonTest.mxml"
${CC} ZoomButtonTest.mxml
%.swf : %.mxml
@ echo "Compiling $@"
${CC} $<
In that example the constant DEPS holds all the dependencies for our main target and CC holds the command used to compile the source. This gives us a nice simple spot at the top of the file to make common changes.





Much interesting, well why all exactly so?
September 16th, 2009 at 11:38